1. Field of the Invention
This invention relates in general to computer storage media, and more particularly to an architecture for interconnecting an array of storage media and a method for controlling the storage media.
2. Description of the Related Art
Modern computers usually consist of one or more central processing units (CPUs) with local high-speed memory connected to input and output devices, network interfaces, and also to mass storage devices, or storage media, for long-term storage of programs and information. The CPU and storage media are connected using a host adapter, and control information and stored (or retrieved) data share a common data path. The CPU is solely responsible for sending control information, but data transfer can be handled by the CPU or by a direct memory access (DMA) controller. The DMA controller of a known prior art storage system must disadvantageously share high-speed memory with the CPU. The DMA controller and the CPU contend for access to the high-speed system memory, and, disadvantageously, each slows the other. Thus, what is needed is a mechanism that reduces the need to share the memory, which will result in higher overall throughput.
When a prior art computer system has more than one storage media that operate simultaneously and in parallel, the CPU must send control information to each separately and sequentially. In other words, the CPU sends control information to each storage media one at a time, and each of these control activities wastes some amount of time. Likewise, the data from each storage media is transferred into high-speed memory separately and sequentially, with each storage media performing its transfer while all others wait their turn to share a data bus.
Storage media do not always operate independently. Multiple storage media are placed into arrangements that enhance the storage system's data storage capacity, data transfer speed, data integrity, or some combination of these. One known method is by striping, i.e., spreading the data across more than one storage media. The RAID 0 (redundant array of independent disks, method 0) configuration can increase both capacity and transfer speed by striping data across a plurality of hard disks, and passing small portions of the data to each storage media in the array. All RAID configurations require two or more storage media and a controller for each storage media. The total storage capacity of the array is equal to the sum of the storage capacities of the individual storage media. Theoretically, the combined data transfer rate approaches the sum of the individual data transfer rates.
Most storage media in use today are based on the Small Computer System Interface (SCSI) or the Advanced Technology bus Attachment (ATA) standards. The two standards are similar in that they both combine control and data signals into the same physical signals, but differ in the electrical details and protocols used to connect the storage media to the CPU. Both require the use of a host-bus adapter to allow the CPU to communicate with the storage media. A major difference between the two standards is that the ATA standard allows only one or two storage media to be connected to a single host adapter, while the SCSI standard allows up to sixteen storage media to be connected. The ATA interface hardware is quite simple when compared to the SCSI interface hardware. The consumer PC industry has adopted the ATA storage media as the standard storage media for most systems. The most common host adapter is based on the Intel 800-series chipset controller that has been incorporated into storage media, and is currently a standard subsystem in the Intel Southbridge architecture. The Intel 800-series chipset interface allows the CPU to pass control information to the ATA storage media and adjust the timing of interface signals to give optimum performance. Data transfers may be performed by the CPU explicitly or by the system DMA controller, moving data between the storage media and the system high-speed memory. A limitation of this interface is that in many systems only two 800-series ATA host adapter interfaces may exist in the system together, and this limits the ability to create large RAID storage systems. The SCSI interface does not share this restriction, and so most RAID storage systems are created using SCSI interfaces, requiring a PC owner to add a SCSI host adapter alongside the ATA host adapters.
The physical medium used to store data within all SCSI and ATA storage media is divided into logical blocks, each of which can hold 512 bytes of data (4096 bits), and each logical block is given a specific logical block address (LBA). When data is transferred to or from the storage media, the LBA of the block is specified as part of the control information, and only whole blocks can be transferred. When arranged in a RAID 0 configuration, the entire array is addressed using a “host” LBA (hLBA), and the RAID subsystem is responsible for addressing a corresponding “media” LBA (mLBA) in each of the arrayed storage media. In those RAID systems where the host computer is directly responsible for addressing the individual storage media, the method and process of associating hLBA with mLBA is contained in the RAID-subsystem device driver (a part of the operating system). RAID subsystem drivers are now included as standard components in many popular operating systems. Disadvantageously, these RAID subsystems require a large number of host adapter connections to achieve the desired performance, and activation of the feature is often a complicated procedure. Alternative RAID implementations add a coprocessor to the host computer, so that the host device driver communicates with only one device directly (the coprocessor), and the coprocessor then commands the various media. In the latter case, the host must have a device driver specifically designed for communicating with the coprocessor, and cannot use the standard storage media device driver.
FIG. 1 illustrates a typical prior art RAID array 100 that employs a coprocessor. The RAID array 100 is designed to accelerate the transfer of data between the various storage media 102 and the memory 104 of a host, or computer system 106. The prior art RAID array 100 has two disadvantages: first, an automated array coprocessor 108 is required to be connected to the PCI bus 110 of the computer system 106, and second, a host storage media driver 112 must be replaced with a specially designed driver. These two disadvantages limit application of the prior art RAID array 100 to those computer systems 106 for which versions of the automated array coprocessor 108 and storage media driver 112 have been implemented. Not all computer systems 106 have the luxury of replacing an existing storage media driver 112. Owners of legacy computer systems already in service are often reluctant to modify the computer system software in any way, often because the qualification process for the computer system is arduous. Medical computer systems and other computer systems with life-and-death reliability requirements undergo both design reviews and reliability demonstrations that are extremely expensive to repeat when an entire computer system must be tested. In other cases, the knowledge and support tools required to modify the software of some older computer systems have been lost in antiquity and it would be impossible to add a new storage media driver regardless of the testing requirements. Thus, what is needed is an apparatus and method without those restrictions in order to allow the storage media to communicate with any type of host interface, and to respond to all host commands in a way that is appropriate and effective.
The RAID array 100 transfers data from each storage media 102 whenever any storage media is ready to transfer and the packet-switched bus 114 is not being used by another storage media. The RAID array 100 employs a single, large, memory buffer 116 that is used to reconstruct the order in which the computer system 106 expects to receive the data. This requires a complex automated array coprocessor 108. Thus, what is needed is a method and apparatus to transfer data on a common payload bus in an order expected by the host computer, thereby eliminating the requirement for the automated array coprocessor.
Prior art storage systems disadvantageously require a micro-controller and an automated array coprocessor to track the data request and the packets, and the storage system is required to re-collect the data when the storage media have completed transferring data. Prior art storage systems disadvantageously require a completion code that the automated array coprocessor must pass back to the micro-controller. Accordingly, there exists a need for overcoming the disadvantages of the prior art as discussed above, including a mechanism that reduces the need to share the memory, which will result in higher overall throughput.